Memory devices are typically provided as internal, semiconductor, integrated circuits in computers or other electronic devices. There are many different types of memory including random-access memory (RAM), read only memory (ROM), dynamic random access memory (DRAM), synchronous dynamic random access memory (SDRAM), and flash memory.
Flash memory devices have developed into a popular source of non-volatile memory for a wide range of electronic applications. Non-volatile memory is memory that can retain its stored data for some extended period without the application of power. Flash memory devices typically use a one-transistor memory cell that allows for high memory densities, high reliability, and low power consumption. Changes in threshold voltage (Vt) of the cells, through programming or “writing” of charge storage nodes (e.g., floating gates or trapping layers or other physical phenomena), corresponds to the data “stored” on each cell. By defining two or more ranges of threshold voltages to correspond to individual data values, one or more bits of data may be stored on each cell (in some cases, this may also be referred to as storing “in” a cell or stored “by” a cell, but there is no distinction intended by such differences in terminology). Memory cells storing one bit of data by utilizing two threshold voltage ranges are typically referred to as Single Level Cell (SLC) memory cells. Memory cells storing more than one bit of data on a cell by utilizing more than two possible threshold voltage ranges are typically referred to as Multilevel Cell (MLC) memory cells, although MLC memory cells can refer to any cell that can be used to store more than two threshold voltage ranges.
MLC technology permits the storage of more than one bit on a cell, depending on the quantity of threshold voltage ranges assigned to the cell and the stability of the assigned threshold voltage ranges during the lifetime operation of the memory cell. The number of threshold voltage ranges, which are sometimes referred to as Vt distribution windows, used to represent a bit pattern comprised of N-bits is 2N.
FIG. 1 illustrates an example threshold voltage distribution 100 for a population of MLC memory cells. For example, a cell may have a Vt that falls within one of four different voltage ranges 102/104/106/108 of 200 mV, each being used to represent a data state corresponding to a respective bit pattern comprised of two bits. Typically, a dead space 110 (which is sometimes referred to as a margin) of 0.2V to 0.4V is maintained between each range to keep the Vt ranges from overlapping. If the threshold voltage of the cell is within the first of the four Vt ranges 102, the cell in this case is storing a logical 11 state and is typically considered the erased state of the cell. If the voltage is within the second of the four Vt ranges 104, the cell in this case is storing a logical 01 state. A voltage in the third range 106 of the four Vt ranges would indicate that the cell in this case is storing a logical 00 state. Finally, a Vt residing in the fourth Vt range 108 indicates that a logical 10 state is stored on the cell.
Another characteristic of MLC memory cells which distinguishes it from SLC memory is that the Vt ranges in MLC memory cells tend to be much narrower and closer together than in SLC memory cells. These narrow ranges should be reliably maintained in order to prevent corruption of the data stored on the memory cells. MLC memory also generally requires that several high voltage pulses be applied to shift memory cell thresholds to the higher threshold voltage ranges such as those ranges 106 and 108 corresponding to the 00 and 10 states. Typically, the most positive memory cell threshold voltage range (e.g., range 108) requires the greatest number and magnitude of programming pulses. As the number and magnitude of these applied programming pulses increases in order to achieve a higher threshold voltage, undesirable effects can result on both the memory cells being programmed (e.g., selected memory cells) and on unselected memory cells nearby. For example, the increased magnitude of the programming pulses can add additional gate stress to the memory cells. The number and magnitude of the applied programming pulses can also cause shifts, also referred to as program disturbs, in the programmed Vt state of nearby memory cells due to capacitive coupling effects, for example.
Flash memory typically utilizes one of two basic architectures known as NOR flash and NAND flash. The designation is derived from the logic used to read the devices. In NOR flash architecture, a column of memory cells are coupled in parallel with each memory cell coupled to a data line, commonly referred to as a bit line. In NAND flash architecture, a column of memory cells are coupled in series with only the first memory cell of the column coupled to a bit line.
Common uses for flash memory and other non-volatile memory include personal computers, personal digital assistants (PDAs), digital cameras, digital media players, digital recorders, games, appliances, vehicles, wireless devices, mobile telephones and removable memory modules, and the uses for non-volatile memory continue to expand.
For the reasons stated above, and for other reasons that will become apparent to those skilled in the art upon reading and understanding the present specification, there is a need in the art for alternative programming methods for programming MLC memory cells.